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Brad Griffis authored
This commit picks up a bunch of missing registers. This was determined by "Save Registers" in CTT. Comparing the generated rd1 file against the one being input showed many missing registers. Sync with v4.0.0.0 http://www.ti.com/tool/clocktreetool Acked-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Brad Griffis <bgriffis@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com>
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