u-boot that might run on the pyra device

  • notaz's avatar
    LC15: incorporate RAM timing fixes from Brad Griffis · ab5941e5
    notaz authored
    From correspondence from Brad Griffis:
    
    The T_RCD bits (24:21) are out of spec. This is the activate-to-read timing.
    They're set to 6 which corresponds to a timing of 7x1.88ns = 13.16ns which is short of the 13.8ns minimum.
    
    T_CKE = Bits[2:0] = 2
    * This field encompasses both tCKE and tCKESR of the Samsung data sheet, so we need to program to satisfy both.
    * Currently a value of 2 corresponds to 3 nCK. That meets tCKE but not tCKESR which must be 4 cycles.
    * Should program this bitfield to a value of 3.
    
    The T_CKESR bits (23:21) are out of spec. This needs to be T_CKE + 1tck.
    Signed-off-by: notaz's avatarGrazvydas Ignotas <notasas@gmail.com>
    ab5941e5
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