...
 
Commits (2)
......@@ -32,6 +32,8 @@
#endif
#define FDTFILE_MAX_LENGTH 256
DECLARE_GLOBAL_DATA_PTR;
const struct omap_sysinfo sysinfo = {
......@@ -190,6 +192,149 @@ static void enable_host_clocks(void)
}
#endif
/* 00 = PD, 10 = FLT, 11 = PU */
#define CPUVERSION_PU 3
#define CPUVERSION_PD 0
#define CPUVERSION_FLOAT 2
/* TODO fix this logic as it is sloppy */
/* TODO move logic into SPL so RAM can be properly detected */
static int get_cpuboard_revision(void)
{
int ram;
int board_rev;
const struct pad_conf_entry cpuversion_pulldown[] = {
{LLIB_WAKEREQOUT, (IEN | PTD | M6)}, /* gpio 2_32 */
{C2C_CLKOUT0, (IEN | PTD | M6)}, /* gpio 2_33 */
{C2C_CLKOUT1, (IEN | PTD | M6)}, /* gpio 2_34 */
};
const struct pad_conf_entry cpuversion_pullup[] = {
{LLIB_WAKEREQOUT, (IEN | PTU | M6)}, /* gpio 2_32 */
{C2C_CLKOUT0, (IEN | PTU | M6)}, /* gpio 2_33 */
{C2C_CLKOUT1, (IEN | PTU | M6)}, /* gpio 2_34 */
};
const struct pad_conf_entry cpuversion_safe[] = {
{LLIB_WAKEREQOUT, (IEN | M6)}, /* gpio 2_32 */
{C2C_CLKOUT0, (IEN | M6)}, /* gpio 2_33 */
{C2C_CLKOUT1, (IEN | M6)}, /* gpio 2_34 */
};
const int cpuboard_revtable[] = {
[CPUVERSION_PD + (CPUVERSION_FLOAT << 2)] = 51,
[CPUVERSION_PU + (CPUVERSION_FLOAT << 2)] = 52,
[CPUVERSION_FLOAT + (CPUVERSION_FLOAT << 2)] = 53,
[CPUVERSION_FLOAT + (CPUVERSION_PD << 2)] = 54,
[CPUVERSION_FLOAT + (CPUVERSION_PU << 2)] = 55
};
const int ram_revtable[] = {
[CPUVERSION_FLOAT] = 2,
[CPUVERSION_PD] = 4,
[CPUVERSION_PU] = 8
};
gpio_request(32, "cpuboard_rev1");
gpio_request(33, "cpuboard_rev2");
gpio_request(34, "cpuboard_rev3");
gpio_direction_input(32);
gpio_direction_input(33);
gpio_direction_input(34);
/* pull down gpios */
do_set_mux((*ctrl)->control_padconf_core_base,
cpuversion_pulldown,
sizeof(cpuversion_pulldown) / sizeof(struct pad_conf_entry));
ram = gpio_get_value(33);
board_rev = gpio_get_value(32) | (gpio_get_value(34) << 2);
/* pull up gpios */
do_set_mux((*ctrl)->control_padconf_core_base,
cpuversion_pullup,
sizeof(cpuversion_pullup) / sizeof(struct pad_conf_entry));
ram |= gpio_get_value(33) << 1;
board_rev |= (gpio_get_value(32) << 1) | (gpio_get_value(34) << 3);
gpio_free(32);
gpio_free(33);
gpio_free(34);
/* revert all gpios */
do_set_mux((*ctrl)->control_padconf_core_base,
cpuversion_safe,
sizeof(cpuversion_safe) / sizeof(struct pad_conf_entry));
if ((board_rev & 0x0F) < 0)
return -1;
return cpuboard_revtable[board_rev & 0x0F];
}
static int get_mainboard_revision(void)
{
int idx;
const int revtable[] = {
56,
55,
54,
52,
53,
51,
50,
50 /* some 5.0 boards report as 4.9 */
};
gpio_request(160, "mainboard_rev1");
gpio_request(182, "mainboard_rev2");
gpio_request(185, "mainboard_rev3");
gpio_direction_input(160);
gpio_direction_input(182);
gpio_direction_input(185);
idx = gpio_get_value(185) << 2;
idx |= gpio_get_value(182) << 1;
idx |= gpio_get_value(160);
gpio_free(160);
gpio_free(182);
gpio_free(185);
if (idx > sizeof(revtable) - 1)
return -1;
return revtable[idx];
}
static void set_fdtfile(void)
{
int main_rev;
int cpu_rev;
char fdtfile[FDTFILE_MAX_LENGTH];
cpu_rev = get_cpuboard_revision();
if (cpu_rev < 0)
return;
main_rev = get_mainboard_revision();
if (main_rev < 0)
return;
printf("HW Revision: CPU: v%d.%d Mainboard: v%d.%d\n", cpu_rev / 10,
cpu_rev % 10,
main_rev / 10,
main_rev % 10);
snprintf(fdtfile,
FDTFILE_MAX_LENGTH,
"omap5-letux-cortex15-v%d.%d+pyra-v%d.%d.dtb",
cpu_rev / 10,
cpu_rev % 10,
main_rev / 10,
main_rev % 10);
int ret = setenv("fdtfile", fdtfile);
printf("setenv: %d\n", ret);
}
/**
* @brief misc_init_r - Configure EVM board specific configurations
* such as power configurations, ethernet initialization as phase2 of
......@@ -206,6 +351,8 @@ int misc_init_r(void)
omap_die_id_usbethaddr();
set_fdtfile();
return 0;
}
......
......@@ -130,6 +130,7 @@
"bootfile=zImage\0" \
"bootpart=1\0" \
"bootos=sysboot mmc ${mmcdev}:${bootpart} any ${scriptaddr} /extlinux/extlinux.conf\0" \
"bootzimage=run loados; bootz ${loadaddr} - ${fdtaddr}\0" \
"console=ttyO2\0" \
"fdtfile=pyra.dtb\0" \
"finduuid=part uuid mmc ${mmcdev}:${rootfspart} uuid\0" \
......